1. Field of the Invention
The present invention relates to an electrode substrate and a display device including the same.
2. Description of the Related Art
Types of liquid crystal display devices that are operated by an active matrix driving method include color liquid crystal display devices using active matrix substrates (electrode substrates). A color liquid crystal display device includes an active matrix substrate, a counter substrate opposing the active matrix substrate and including a common electrode, a liquid crystal layer interposed between the substrates, and a color filter provided on the common electrode side. The color filter includes red (R) regions, green (G) regions and blue (B) regions arranged in a predetermined arrangement so that each region corresponds to one of a plurality of pixel electrodes provided on the active matrix substrate. An R region forms a red (R) pixel, a G region a green (G) pixel, and a B region a blue (B) pixel. Arrangements of the pixels of these three colors include a delta arrangement as disclosed in Japanese Patent Publication for Opposition No. 3-64046 (Patent Document 1), for example.
FIG. 15 is a schematic plan view showing an active matrix substrate 500 of a conventional liquid crystal display device including pixels arranged in a delta arrangement.
FIG. 16 is a partial plan view showing, on an enlarged scale, a portion of the active matrix substrate 500.
The active matrix substrate 500 includes a gate driver 502 and a source driver 503. A plurality of gate bus lines 504 extend in parallel to one another from the gate driver 502. A plurality of source bus lines 505 extend in parallel to one another from the source driver 503 at right angles to the direction of the gate bus lines 504. The gate bus lines 504 and the source bus lines 505 cross each other in a display section 501. A TFT 506 connected to both the gate bus line 504 and the source bus line 505 is provided in the vicinity of each of the intersections between the gate bus lines 504 and the source bus lines 505. One end of the TFT 506 is connected to a pixel electrode 507. A storage capacitor element 509 is electrically connected to each of the pixel electrodes 507.
In the active matrix substrate 500, a parasitic capacitor is formed between adjacent pixel electrodes 507, etc. Therefore, when an image is displayed by a conventional liquid crystal display device including the active matrix substrate 500, the potential of the pixel electrode 507 is varied by the charge stored in the parasitic capacitor, thus decreasing the image display quality.
The decrease in the image display quality due to a parasitic capacitor will now be described with reference to the drawings.
FIG. 17 is a plan view schematically showing a parasitic capacitor formed in the active matrix substrate 500.
Generally three types of parasitic capacitors are formed in the active matrix substrate 500. The first parasitic capacitor is a parasitic capacitor Csd formed between a source bus line 505 and a pixel electrode 507. The second parasitic capacitor is a parasitic capacitor Cpp formed between adjacent pixel electrodes 507. The third parasitic capacitor is a parasitic capacitor Cps formed between a pixel electrode 507 and a storage capacitor element 509 that is electrically connected to an adjacent pixel electrode 507.
Among these types of parasitic capacitors, the parasitic capacitor Csd can be classified further into two types of parasitic capacitors. One is a parasitic capacitor Csd1 formed between a pixel electrode 507 and a source bus line 505 that is connected to the pixel electrode 507 via the TFT 506. The other one is a parasitic capacitor Csd2 formed between a pixel electrode 507 and a source bus line 505 that receives a display signal of a display color different from that of the pixel electrode 507.
The parasitic capacitor Cpp can be classified into a parasitic capacitor Cppno formed between pixel electrodes 507 adjacent to each other in the direction in which the source bus line 505 extends, and a parasitic capacitor Cppsl formed between pixel electrodes 507 that are adjacent to each other with a source bus line 505 therebetween and that are connected to different gate bus lines 504 (i.e., pixel electrodes 507 provided along different rows).
As is the parasitic capacitor Cpp, the parasitic capacitor Cps can be classified into two types. Specifically, one is a parasitic capacitor Cpsno formed between a first pixel electrode 507 and a storage capacitor element 509 that is electrically connected to a second pixel electrode 507 adjacent to the first pixel electrode 507 in the direction in which the source bus line 505 extends. The other one is a parasitic capacitor Cpss1 formed between a first pixel electrode 507 and a storage capacitor element 509 that is electrically connected to a second pixel electrode 507, wherein the first and second pixel electrodes 507 are adjacent to each other with a source bus line 505 therebetween and are connected to different gate bus lines 504 (i.e., provided along different rows).
With the parasitic capacitors Csd2, Cppno, Cppsl, Cpsno and Cpssl, among these parasitic capacitors, the amount of potential of the pixel electrode 507 to be varied differs from row to row due to the difference between the types of the adjacent pixel electrodes 507. Therefore, there occurs a luminance non-uniformity among rows (horizontal stripes), thus decreasing the image display quality.